On platforms where hardware timers are available, test these in each
combination of hard/soft and one-shot/periodic in the same way as for
software timers. Where a platform supports both software (id = -1) and
hardware (id >= 0) timers, the behaviour of both is now checked.
For now, esp8266 is the only platform that supports hardware timers and
both hard and soft callbacks.
Signed-off-by: Chris Webb <chris@arachsys.com>
Now all ports with machine.Timer except nrf support both hard and
soft callbacks, generalise tests/ports/rp2_machine_timer.py into
tests/extmod/machine_timer.py.
There is an existing machine_soft_timer.py which varies period= and
covers the nrf port but skips esp32/esp8266 because they don't support
software timers. In our new test, we try varying freq= instead of period=,
and cover esp32/esp8266 (with a fixed choice of hardware timer) but skip
nrf because it doesn't support hard= or freq=.
Add a check that the heap is locked (so allocation fails) in hard
callbacks and it is unlocked (so allocation succeeds) in soft callbacks,
to ensure we're getting the right kind of callback, not falling back to
the default.
Signed-off-by: Chris Webb <chris@arachsys.com>
machine.Timer() has inconsistent behaviour between ports: some run
callbacks in hard IRQ context whereas others schedule them like soft IRQs.
Most ports now support a hard= argument to the machine.Timer constructor
or initialiser to explicitly choose between these behaviours. However,
esp32 does not support hardware interrupts because they are not delivered
to the main thread, so the interrupt handler would need to acquire the GIL.
Raise a ValueError if hard=True is requested for esp32 machine.Timer.
Signed-off-by: Chris Webb <chris@arachsys.com>
machine.Timer() has inconsistent behaviour between ports: some run
callbacks in hard IRQ context whereas others schedule them like soft IRQs.
As on the rp2 port, add support to the esp8266 port for a hard= argument
to explicitly choose between these, setting the default to False to match
the existing behaviour. Open-code this as we don't link against mpirq.c
so can't use mp_irq_dispatch().
Signed-off-by: Chris Webb <chris@arachsys.com>
machine.Timer() has inconsistent behaviour between ports: some run
callbacks in hard IRQ context whereas others schedule them like soft IRQs.
As on the rp2 port, add support to the zephyr port for a hard= argument
to explicitly choose between these, setting the default to False to match
the existing behaviour.
Adjust the stack-limit check to use the ISR stack while the callback is
dispatched so that hard IRQ callbacks work, as with machine_pin.c and
machine_i2c_target.c IRQ callbacks.
Signed-off-by: Chris Webb <chris@arachsys.com>
machine.Timer() has inconsistent behaviour between ports: some run
callbacks in hard IRQ context whereas others schedule them like soft IRQs.
As on the rp2 port, add support to the stm32 port for a hard= argument
to explicitly choose between these, setting the default to True to match
the existing behaviour.
Signed-off-by: Chris Webb <chris@arachsys.com>
machine.Timer() has inconsistent behaviour between ports: some run
callbacks in hard IRQ context whereas others schedule them like soft IRQs.
As on the rp2 port, add support to the renesas-ra port for a hard= argument
to explicitly choose between these, setting the default to True to match
the existing behaviour.
Signed-off-by: Chris Webb <chris@arachsys.com>
Now that mp_irq_dispatch() is available to dispatch arbitary hard/soft
callbacks, take advantage of this for rp2 machine.Timer. This should
slightly reduce binary size.
Signed-off-by: Chris Webb <chris@arachsys.com>
machine.Timer() has inconsistent behaviour between ports: some run
callbacks in hard IRQ context whereas others schedule them like soft IRQs.
As on the rp2 port, add support to the generic software timer for a hard=
argument to explicitly choose between these, setting the default to False
to match the existing behaviour. This enables hard timer callbacks for
the alif, mimxrt and samd ports.
Signed-off-by: Chris Webb <chris@arachsys.com>
Add a flag SOFT_TIMER_HARD_CALLBACK to request that a soft timer's python
callback is run directly from the IRQ handler with the scheduler and heap
locked, instead of being scheduled via mp_sched_schedule().
Signed-off-by: Chris Webb <chris@arachsys.com>
Separate out a routine to call an arbitrary function with arbitrary
argument either directly as a hard-IRQ handler or scheduled as a soft-IRQ
handler, adjusting mp_irq_handler() to wrap this. This can then be used
to implement other hard/soft callbacks, such as for machine.Timer.
Signed-off-by: Chris Webb <chris@arachsys.com>
Changes made here for N6 are:
- set RIF security attributes for ADC12
- clock ADC12 at 50MHz (maximum) so it runs at spec (max 5Msamp/sec)
- increase sampling time for standard channels to 46.5 cycles
- calibrate ADC in `adc.c`
- correctly clear ADC_CFGR1_RES bits in `machine_adc.c`
- set preselection register in `machine_adc.c`
Signed-off-by: Damien George <damien@micropython.org>
Otherwise an error message will pop up at the first instatiation
of the UART object.
Addresses #18122 / #18123.
Signed-off-by: robert-hh <robert@hammelrath.com>
Currently it seems if master branch doesn't build for 1-2 days then the
cached ESP-IDF install (1.6GB) and Zephyr workspace (3.1GB) caches expire.
Then each PR branch has to create its own redundant cache instead of
falling back to the default branch cache, which is expensive and quickly
blows our 10GB cache limit.
Currently this is mitigated (and possibly happens more frequently) due to
GitHub's relatively soft enforcement of the limit (at time of writing we're
using 33GB of 10GB), but apparently they're going to start enforcing it
more aggressively in October.
(We may find we need to do this twice a day...)
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
The Windows 8.1 sdksetup.exe in particular seems seems to fail
intermittently pretty often, so retry each step up to four times before
failing outright.
Delete the Chocolatey temp directory between each run, as it seems like the
root cause is a corrupt download.
This work was funded through GitHub Sponsors.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
Add support to `tools/metrics.py` to compute the size delta of mpy-cross,
alongside the sizes of port firmware. This is an easy and cheap addition
because mpy-cross is usually built before the ports are.
Although the size of mpy-cross is not critical, it's still a nice
indication of how changes affect code size, and helps to eliminate any
unwanted increases in mpy-cross.
Signed-off-by: Damien George <damien@micropython.org>
Fixes are:
- Enable VREG before initializing ADC.
- The channel value of internal sensor should convert with
__LL_ADC_CHANNEL_TO_DECIMAL_NB().
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
Fixes are:
- The internal sensors of STM32G0 are connected channel 12, 13, 14.
- Update adc_refcor before reading vbat and tempsensor because reference
values are at VDDA=3.0V.
- The method of initialize of sampling time is different with other MCUs:
STM32G0 should initialize SamplingTimeCommon1/2 first. When reading
value from ADC, ADC_ChannelConfTypeDef.SamplingTime should be specified
SamplingTimeCommon1 or SamplingTimeCommon2. In this patch,
SamplingTimeCommon2 is used for internal sensors and SamplingTimeCommon1
is used for external ADC channels.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
Lines like the following were not handled by `make-stmconst.py`:
#define APBPERIPH_BASE (PERIPH_BASE)
This leads to missing definitions on stm module. For example, `stm.RTC` is
not defined if `RTC_BASE` is defined as
#define RTC_BASE (APBPERIPH_BASE + 0x00002800UL)
because `APBPERIPH_BASE` is not handled as a valid id.
This patch modifies the RegExp so it can handle the above.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
Previously, when running `micropython -m <module>` and the module called
sys.exit(), the registered atexit function was not executed. This was due
to sys.exit() raising a SystemExit exception, which bypassed the atexit
handler. This change fixes the issue so that the atexit function is
properly invoked when exiting via sys.exit().
Additionally, following the pattern in execute_from_lexer(),
mp_hal_set_interrupt_char() and mp_handle_pending() handling were added to
ensure that the atexit function is also executed when the user exits via
Ctrl-C.
Signed-off-by: Mike Wang <mikewang000000@gmail.com>
After s.close(), s.fileno() now returns -1, matching CPython behavior.
Some code relies on this compatibility, as it allows checking whether
a socket is closed by testing its fileno() value. This change ensures
better interoperability with existing Python code and libraries.
Signed-off-by: Mike Wang <mikewang000000@gmail.com>
This commit enables generation of Zba opcodes by the native emitter
for the Pico2, as its RISC-V implementation supports both of those
extensions (see section 3.8 of the RP2350 datasheet).
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit enables the usage of the Zba address generation opcodes in
the QEMU port when targeting the "VIRT_RV32" board, which emulates a
generic RV32 target.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit adds support for Zba opcodes to the RV32 inline assembler.
Three new opcodes were added, SH1ADD, SH2ADD, and SH3ADD, which performs
a scaled addition (by 1, 2, or 3 bits respectively). At the moment only
qemu's VIRT_RV32 and rp2's RPI_PICO2/RPI_PICO2_W ports support these
opcodes (the latter only when using the RISCV variant).
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit adds a new command line switch to inform the RV32 emitter to
use Zba opcodes in its output.
A new implementation-specific option was introduced, called
"-march-flags", that will contain a list of additional
architecture-specific flags to pass to the chosen native emitter
implementation.
At the moment only the RV32 emitter can make use of this command line
facility: if the architecture flags string equals to "zba"
(case-sensitive), then the native emitter will emit Zba opcodes if it
has a chance to do so.
At the moment there is no check on whether additional architecture flags
using to build a MPY file are compatible with the target the output code
is run on, so use this with caution.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit adds optional support for selected Zba opcodes (address
generation) to speed up Viper and native code generation on MCUs where
those opcodes are supported (namely RP2350).
Right now support for these opcodes is opt-in, as extension detection
granularity on the RISC-V platform is still a bit in flux. Relying on
the 'B' bit in the MISA register may yield both false positives and
false negatives depending on the RISC-V implementation the check runs
on.
As a side-effect of Zba support, regular non-byte load/stores have been
made shorter by two bytes. Whilst this makes code using Zba take up the
same space as non-Zba code, the former will still be faster as it will
have to process just one instruction instead of two, without stalling
registers between the shift and the addition needed to compute the final
offset.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit introduces a way for mpy-cross to pass a set of options to
the chosen emitter.
This is achieved by adding an opaque pointer to the dynamic compiler
state structure that is only accessed by emitters that have a need to
receive options from mpy-cross when generating code. That's a way to
make this feature possible without breaking any existing code or
emitter, and without re-engineering the compiler entry point function
(together with passing the options struct downstream until it's time to
emit code).
The main use case for this is letting the RV32 emitter know which
optional extensions it can generate code with, to be able to emit better
suited code for the platform in use.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This adds a QEMU-based bare metal RISC-V 64 bits port. For the time being
only QEMU's "virt" 64 bits board is supported, using the lp64 ABI and the
RV64IMC architecture.
The port's README is also updated to keep track of these changes.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
MPY files can now hold data to be run on RV64IMC. This can be
accomplished by passing the `-march=rv64imc` flag to mpy-cross.
Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
Use constants from the HAL instead of literal numbers to select which
peripheral clocks are enabled during low power mode.
Signed-off-by: Damien George <damien@micropython.org>
For NUCLEO boards that does not have HSE crystal, HSEState should set
RCC_HSE_BYPASS to use HSE clock from ST-LINK 8MHz.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
UART prescaler value should set up correctly to initialize LPUART with low
baudrate for STM32G0/G4/H5. This can be implemented similarly to
STM32H7/N6/WB.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
For STM32G4, hardware I2C can implement same as STM32L4 for machine.I2C.
This commit makes to be able to use of hardware I2C in machine.I2C.
Tested on NUCLEO-G474RE.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
For NUCLEO-G474RE, FLASH_LATENCY_4 can be specified instead of
FLASH_LATENCY_8 because it runs at 170MHz.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
The option '-s' (--diff-score) or '-m' (--diff-time) fails when the
specified result contains tests that was skipped or failed.
This patch ignores "skipped: " or "failed: " message.
Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
These are convenience targets for running specific tests as a developer.
They are more useful that invoking run-tests directly as they take account
of the VARIANT= specified on the make command-line.
For instance, you can run all tests matching the regular expression "int"
with `make VARIANT=... test//int`.
The new targets are all documented in README.md.
Signed-off-by: Jeff Epler <jepler@gmail.com>
