Commit Graph

20 Commits

Author SHA1 Message Date
Timothy B. Terriberry
0808841125
Only build platform RTCD sources when enabled.
To avoid issues with empty compilation units.
2022-07-09 21:18:52 -07:00
Marcus Asteborg
f9d3d432d1
Adding CMake support for Windows, Mac, Linux and Android Co-Authored-By: evpobr
Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
2019-04-03 11:51:13 -04:00
Ralph Giles
e2cdf9b98f
Rename arm ne10 assembly optimization files.
Make these consistent with the other optimization file
sets which use a suffix to indicate the extension they
use.

Signed-off-by: Jonathan Lennox <jonathan@vidyo.com>
2017-09-11 09:11:25 -07:00
Ralph Giles
6db968e9ad
Rename SSE 4.1 files to match their targets.
Distinguish source files for the SSE 4.1 instruction
set extension consistently by their filename. This makes
it easier to check the correct flags are being set at
build time.

Signed-off-by: Jonathan Lennox <jonathan@vidyo.com>
2017-09-11 09:11:13 -07:00
Ralph Giles
c5ce20e6e8
Fix spacing in celt_sources.mk.
Uniform layout is easier for external tools to parse,
especially maintaining one source file per line.

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
2017-06-14 14:25:07 -07:00
Linfeng Zhang
4d4ed208b1
Optimize fixed-point celt_inner_prod() and dual_inner_prod() for ARM NEON
This optimization is bit exact with C functions.

Change-Id: Ia9ce6dd3c20d2f56dbd43ddc02d1a6fd6554608d

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
2017-06-06 17:12:20 -04:00
Jean-Marc Valin
76674feae2 SSE2 implementation of the PVQ search
We used the SSE reciprocal square root instruction to vectorize the serch rather
than compare one at a time with multiplies. Speeds up the entire encoder by 8-10%.
2016-08-09 23:22:27 -04:00
Viswanath Puttagunta
f48abe8308 armv7(float): Optimize encode usecase using NE10 library
Optimize opus encode (float only) usecase using ARM NE10
library. Mainly effects opus_fft and ctl_mdct_forward
and related functions.

This optimization can be used for ARM CPUs that have NEON
VFP unit. This patch only enables optimizations for ARMv7.

Official ARM NE10 library page available at
http://projectne10.github.io/Ne10/

To enable this optimization, use
--enable-intrinsics --with-NE10=<install_prefix>
or
--enable-intrinsics --with-NE10-libraries=<NE10_lib_dir> --with-NE10-includes=<NE10_includes_dir>

Compile time checks made during configure process to make sure
optimization option available only when compiler supports NEON
instrinsics.

Runtime checks made to make sure optimized functions only called
on appropriate hardware.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
2015-10-07 18:09:20 -04:00
Jonathan Lennox
cb0875e07d Move SSE2 and SSE4.1 intrinsics functions to separate files, to be compiled with appropriate compiler flags. Otherwise, compilers are allowed to take advantage of (e.g.) -msse4.1 to generate code that uses SSE4.1 instructions, even when no SSE4.1 intrinsics are explicitly used in the source. 2015-09-01 17:21:31 -04:00
Viswanath Puttagunta
0b0a2b4d06 armv7: celt_pitch_xcorr: Introduce ARM NEON intrinsics
Optimize celt_pitch_xcorr function (for floating point)
using ARM NEON intrinsics for SoCs that have NEON VFP unit.

To enable this optimization, use --enable-intrinsics
configure option.

Compile time and runtime checks are also supported to make sure
this optimization is only enabled when the compiler supports
NEON intrinsics.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
2014-12-25 14:36:46 -08:00
xiangmingzhu
c95c9a048f Cisco optimization for x86 & fixed point
1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD
   intrinsics up to SSE4.2)
2. Use "configure --enable-fixed-point --enable-intrinsics" to enable
   optimization, default is disabled.
3. Official test cases are verified and passed.

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
2014-10-03 21:16:00 -04:00
Timothy B. Terriberry
39386e0b85 Adds Neon assembly for correlation/convolution
Optimizing celt_pitch_xcorr()/xcorr_kernel() which also speeds up
FIRs, IIRs and auto-correlations

Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
2013-11-18 13:41:17 -05:00
Aurélien Zanelli
cd4c8249bc Add run-time CPU detection and support for ARM architecture
Run-time CPU detection (RTCD) is enabled by default if target platform support
it.
It can be disable at compile time with --disable-rtcd option.

Add RTCD support for ARM architecture.

Thanks to Timothy B. Terriberry for help and code review

Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
2013-06-04 16:23:22 -07:00
Jean-Marc Valin
6906210cb0 Splits out the CELT encoder and decoder 2012-11-08 09:42:27 -05:00
Jean-Marc Valin
2779df7ff6 Renaming the CELT plc.c file to celt_lpc.c to avoid MSVC conflicts with Skype's PLC.c 2011-10-04 13:31:54 -04:00
Jean-Marc Valin
c37499090b renames the libcelt/ directory to celt/ 2011-09-13 18:21:18 -07:00
Jean-Marc Valin
79f303909a Fixes the build of the draft 2011-04-28 16:41:47 -04:00
Timothy B. Terriberry
a1dd0fcf93 Update Opus range coder due to CELT refactoring.
The byte buffer is now part of the range coder struct itself, and
 rangeenc.c and rangedec.c have gone away.
2011-02-03 22:32:27 -05:00
Jean-Marc Valin
5060bfd783 file list update 2011-02-03 12:34:02 -05:00
Jean-Marc Valin
1c09febec7 A simpler build system for the draft 2011-02-03 11:34:11 -05:00