Improving PLC
Should handle the history in a more consistent way. Slightly increase the model size and re-enable biased band loss in training.
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@ -51,6 +51,8 @@ void lpcnet_plc_reset(LPCNetPLCState *st) {
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st->blend = 0;
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st->loss_count = 0;
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st->analysis_gap = 1;
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st->analysis_pos = PLC_BUF_SIZE;
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st->predict_pos = PLC_BUF_SIZE;
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}
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int lpcnet_plc_init(LPCNetPLCState *st) {
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@ -58,7 +60,6 @@ int lpcnet_plc_init(LPCNetPLCState *st) {
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st->arch = opus_select_arch();
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fargan_init(&st->fargan);
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lpcnet_encoder_init(&st->enc);
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st->analysis_pos = PLC_BUF_SIZE;
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st->loaded = 0;
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#ifndef USE_WEIGHTS_FILE
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ret = init_plc_model(&st->model, lpcnet_plc_arrays);
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@ -148,6 +149,7 @@ int lpcnet_plc_update(LPCNetPLCState *st, opus_int16 *pcm) {
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int i;
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if (st->analysis_pos - FRAME_SIZE >= 0) st->analysis_pos -= FRAME_SIZE;
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else st->analysis_gap = 1;
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if (st->predict_pos - FRAME_SIZE >= 0) st->predict_pos -= FRAME_SIZE;
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OPUS_MOVE(st->pcm, &st->pcm[FRAME_SIZE], PLC_BUF_SIZE-FRAME_SIZE);
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for (i=0;i<FRAME_SIZE;i++) st->pcm[PLC_BUF_SIZE-FRAME_SIZE+i] = (1.f/32768.f)*pcm[i];
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st->loss_count = 0;
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@ -161,28 +163,38 @@ int lpcnet_plc_conceal(LPCNetPLCState *st, opus_int16 *pcm) {
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celt_assert(st->loaded);
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if (st->blend == 0) {
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int count = 0;
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st->plc_net = st->plc_bak[0];
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while (st->analysis_pos + FRAME_SIZE <= PLC_BUF_SIZE) {
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float x[FRAME_SIZE];
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float plc_features[2*NB_BANDS+NB_FEATURES+1];
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celt_assert(st->analysis_pos >= 0);
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for (i=0;i<FRAME_SIZE;i++) x[i] = 32768.f*st->pcm[st->analysis_pos+i];
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burg_cepstral_analysis(plc_features, x);
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lpcnet_compute_single_frame_features_float(&st->enc, x, st->features, st->arch);
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if ((st->analysis_gap && count > 0) || count > 1) {
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if ((!st->analysis_gap || count>0) && st->analysis_pos >= st->predict_pos) {
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queue_features(st, st->features);
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OPUS_COPY(&plc_features[2*NB_BANDS], st->features, NB_FEATURES);
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plc_features[2*NB_BANDS+NB_FEATURES] = 1;
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st->plc_bak[0] = st->plc_bak[1];
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st->plc_bak[1] = st->plc_net;
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compute_plc_pred(st, st->features, plc_features);
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}
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st->analysis_pos += FRAME_SIZE;
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count++;
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}
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st->plc_bak[0] = st->plc_bak[1];
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st->plc_bak[1] = st->plc_net;
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get_fec_or_pred(st, st->features);
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queue_features(st, st->features);
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st->plc_bak[0] = st->plc_bak[1];
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st->plc_bak[1] = st->plc_net;
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get_fec_or_pred(st, st->features);
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queue_features(st, st->features);
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fargan_cont(&st->fargan, &st->pcm[PLC_BUF_SIZE-FARGAN_CONT_SAMPLES], st->cont_features);
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st->analysis_gap = 0;
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}
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st->plc_bak[0] = st->plc_bak[1];
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st->plc_bak[1] = st->plc_net;
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if (get_fec_or_pred(st, st->features)) st->loss_count = 0;
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else st->loss_count++;
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if (st->loss_count >= 10) st->features[0] = MAX16(-10, st->features[0]+att_table[9] - 2*(st->loss_count-9));
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@ -191,6 +203,7 @@ int lpcnet_plc_conceal(LPCNetPLCState *st, opus_int16 *pcm) {
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queue_features(st, st->features);
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if (st->analysis_pos - FRAME_SIZE >= 0) st->analysis_pos -= FRAME_SIZE;
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else st->analysis_gap = 1;
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st->predict_pos = PLC_BUF_SIZE;
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OPUS_MOVE(st->pcm, &st->pcm[FRAME_SIZE], PLC_BUF_SIZE-FRAME_SIZE);
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for (i=0;i<FRAME_SIZE;i++) st->pcm[PLC_BUF_SIZE-FRAME_SIZE+i] = (1.f/32768.f)*pcm[i];
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st->blend = 1;
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@ -41,7 +41,7 @@ struct LPCNetEncState{
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float burg_cepstrum[2*NB_BANDS];
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};
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#define PLC_BUF_SIZE (CONT_VECTORS*FRAME_SIZE)
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#define PLC_BUF_SIZE ((CONT_VECTORS+5)*FRAME_SIZE)
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struct LPCNetPLCState {
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PLCModel model;
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FARGANState fargan;
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@ -56,12 +56,14 @@ struct LPCNetPLCState {
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int fec_fill_pos;
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int fec_skip;
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int analysis_pos;
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int predict_pos;
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float pcm[PLC_BUF_SIZE];
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int blend;
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float features[NB_TOTAL_FEATURES];
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float cont_features[CONT_VECTORS*NB_FEATURES];
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int loss_count;
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PLCNetState plc_net;
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PLCNetState plc_bak[2];
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};
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void preemphasis(float *y, float *mem, const float *x, float coef, int N);
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