Commit Graph

7 Commits

Author SHA1 Message Date
Alessandro Gatti
9c9b99686e tests/target_wiring: Provide an ESP8266 target wiring module.
This commit introduces ESP8266 support for target wiring tests, fixing
execution of relevant tests that once failed on that platform.

ESP8266 boards need to have GPIO4 and GPIO5 connected together to
provide a UART loopback, in order to test whether UART data effectively
flows through.

The wiring-enabled UART transmission timing test was also updated with
measurements compatible with a few ESP8266 test boards.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
2025-12-17 16:05:49 +11:00
Damien George
5bafb0bf68 tests: Convert all machine.UART tests to use target_wiring.
All the existing `machine.UART` tests in extmod and extmod_hardware are
converted to use the new `target_wiring` scheme, which removes a lot of
duplicated board-specific settings.

All the existing boards that were supported by these UART tests now have
their own `target_wiring` file.  Some configurations are board specific (eg
NUCLEO_WB55) and others are port specific.

Signed-off-by: Damien George <damien@micropython.org>
2025-09-08 11:52:49 +10:00
Damien George
bb484b6d81 tests/extmod/machine_uart_tx.py: Support STM32WB boards.
Signed-off-by: Damien George <damien@micropython.org>
2025-07-08 13:17:57 +10:00
Damien George
037f2dad72 tests: Update UART and SPI tests to work on Alif boards.
Signed-off-by: Damien George <damien@micropython.org>
2025-04-09 00:22:33 +10:00
Damien George
3f54e5dff2 tests/extmod: Support esp32,mimxrt,stm32,samd ports in UART TX test.
Getting this test running on stm32- and mimxrt-based boards requires adding
a small delay after constructing the UART so that the initial idle frame
has time to be transmitted before the test starts.

Also, the timing margin needs to account for an additional 1-bit worth of
time on some MCUs.

Thanks to @robert-hh for the esp32, mimxrt and samd settings.

Signed-off-by: Damien George <damien@micropython.org>
2024-10-22 22:21:17 +11:00
Damien George
97af1001ae rp2/machine_uart: Make it so TX is done only when no longer busy.
Prior to this commit, when flushing a UART on the rp2 port, it returns just
before the last character is sent out the wire.

Fix this by waiting until the BUSY flag is cleared.

This also fixes the behaviour of `UART.txdone()` to return `True` only when
the last byte has gone out.

Updated docs and tests to match.  The test now checks that UART TX time is
very close to the expected time (prior, it was just testing that the TX
time was less than the expected time).

Signed-off-by: Damien George <damien@micropython.org>
2024-10-22 10:17:05 +11:00
robert-hh
c41b421d48 tests/extmod/machine_uart_tx.py: Add a test for timing of UART.flush().
Currently only runs on rp2 but could be extended to run on other targets.

Signed-off-by: robert-hh <robert@hammelrath.com>
2024-01-16 09:07:03 +11:00